579 lines
16 KiB
C
579 lines
16 KiB
C
//#include "ls1c103.h"
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#include "ls1x.h"
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#include "ls1x_gpio.h"
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#include "test.h"
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#include "ls1x_gpio.h"
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#include "ls1c103_map.h"
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#include "ls1c103_tim.h"
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#include "ls1c103_dcm_tim.h"
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#include "Config.h"
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static int err;
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static dcm_motor_dir_t direction; // dir
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static uint16_t dutyfactor; // speed
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extern INT8U x_getchar(void);
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extern unsigned int str2num(unsigned char *);
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static uint8_t scan_key(uint32_t key){
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uint16_t keyuse;
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if(key == KEY1){
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keyuse = GPIO_Pin_13;
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}
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else{
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keyuse = GPIO_Pin_12;
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}
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uint8_t sflag = GPIO_ReadInputDataBit(GPIOA, keyuse);
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if(sflag==0){
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while(sflag==0){
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sflag = GPIO_ReadInputDataBit(GPIOA, keyuse);
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}
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return 1;
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}
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else{
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return 0;
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}
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}
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static void GPIO_Configuration(void)
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{
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AFIO_RemapConfig(AFIOA, GPIO_Pin_12 | GPIO_Pin_13, GPIO_FUNC_GPIO);
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GPIO_InitTypeDef GPIO_InitStructure;
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12 | GPIO_Pin_13;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_Init(GPIOA, &GPIO_InitStructure);
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}
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static void GPIO_Configuration_DCM(void)
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{
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GPIO_InitTypeDef GPIO_InitStructure;
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AFIO_RemapConfig(AFIOA, GPIO_Pin_0 | GPIO_Pin_2 | GPIO_Pin_4, GPIO_FUNC_MAIN);
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AFIO_RemapConfig(AFIOA, GPIO_Pin_13, GPIO_FUNC_SECOND);
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/* GPIOA Configuration: Channel 1, 2, 3 and 4 as alternate function push-pull */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_2 | GPIO_Pin_4 | GPIO_Pin_13;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_Init(GPIOA, &GPIO_InitStructure);
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}
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static void GPIO_Configuration_DCM2(void)
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{
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GPIO_InitTypeDef GPIO_InitStructure;
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AFIO_RemapConfig(AFIOA, GPIO_Pin_7 | GPIO_Pin_8, GPIO_FUNC_MAIN);
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/* GPIOA Configuration: Channel 1, 2, 3 and 4 as alternate function push-pull */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_Init(GPIOA, &GPIO_InitStructure);
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}
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static void TIM_DCM_CONFIG(){
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uint32_t tmpcr1;
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uint32_t tmpccmrx;
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uint32_t tmpccer;
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uint32_t tmpcr2;
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tmpcr1 = DCM_TIM->CR1;
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tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
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tmpcr1 |= TIM_CounterMode_Up;
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tmpcr1 &= ~TIM_CR1_CKD;
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tmpcr1 |= (uint32_t)TIM_CKD_DIV1;
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tmpcr1 |= (uint32_t)TIM_CR1_ARPE;
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DCM_TIM->CR1 = tmpcr1;
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/* Set the Autoreload value */
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DCM_TIM->ARR = (uint32_t)DCM_PERIOD_COUNT - 1;
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/* Set the Prescaler value */
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DCM_TIM->PSC = DCM_PRESCALER_COUNT - 1;
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DCM_TIM->RCR = 0;
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DCM_TIM->EGR = TIM_EGR_UG;
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/*PWM模式配置*/
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// 初始化通道 1 输出 PWM
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DCM_TIM->CCER &= ~TIM_CCER_CC1E;
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/* Get the TIMx CCER register value */
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tmpccer = DCM_TIM->CCER;
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/* Get the TIMx CR2 register value */
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tmpcr2 = DCM_TIM->CR2;
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/* Get the TIMx CCMR1 register value */
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tmpccmrx = DCM_TIM->CCMR1;
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/* Reset the Output Compare Mode Bits */
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tmpccmrx &= ~TIM_CCMR1_OC1M;
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tmpccmrx &= ~TIM_CCMR1_CC1S;
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/* Select the Output Compare Mode */
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tmpccmrx |= TIM_OCMode_PWM1;
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/* Reset the Output Polarity level */
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tmpccer &= ~TIM_CCER_CC1P;
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/* Set the Output Compare Polarity */
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tmpccer |= TIM_OCPolarity_High;
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/* Reset the Output Compare IDLE State */
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tmpcr2 &= ~TIM_CR2_OIS1;
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/* Set the Output Idle state */
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tmpcr2 |= TIM_OCIdleState_Reset;
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/* Write to TIMx CR2 */
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DCM_TIM->CR2 = tmpcr2;
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/* Write to TIMx CCMR1 */
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DCM_TIM->CCMR1 = tmpccmrx;
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/* Set the Capture Compare Register value */
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DCM_TIM->CCR1 = 0;
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/* Write to TIMx CCER */
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DCM_TIM->CCER = tmpccer;
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DCM_TIM->CCMR1 |= TIM_CCMR1_OC1PE;
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// 初始化通道 2 输出 PWM
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DCM_TIM->CCER &= ~TIM_CCER_CC2E;
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/* Get the TIMx CCER register value */
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tmpccer = DCM_TIM->CCER;
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/* Get the TIMx CR2 register value */
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tmpcr2 = DCM_TIM->CR2;
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/* Get the TIMx CCMR1 register value */
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tmpccmrx = DCM_TIM->CCMR1;
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/* Reset the Output Compare Mode Bits */
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tmpccmrx &= ~TIM_CCMR1_OC2M;
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tmpccmrx &= ~TIM_CCMR1_CC2S;
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/* Select the Output Compare Mode */
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tmpccmrx |= (TIM_OCMode_PWM1 << 8);
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/* Reset the Output Polarity level */
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tmpccer &= ~TIM_CCER_CC2P;
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/* Set the Output Compare Polarity */
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tmpccer |= (TIM_OCPolarity_High << 4);
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/* Reset the Output Compare IDLE State */
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tmpcr2 &= ~TIM_CR2_OIS2;
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/* Set the Output Idle state */
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tmpcr2 |= (TIM_OCIdleState_Reset << 2);
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/* Write to TIMx CR2 */
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DCM_TIM->CR2 = tmpcr2;
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/* Write to TIMx CCMR1 */
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DCM_TIM->CCMR1 = tmpccmrx;
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/* Set the Capture Compare Register value */
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DCM_TIM->CCR2 = 0;
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/* Write to TIMx CCER */
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DCM_TIM->CCER = tmpccer;
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DCM_TIM->CCMR1 |= TIM_CCMR1_OC2PE;
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// 初始化通道 3 输出 PWM
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DCM_TIM->CCER &= ~TIM_CCER_CC3E;
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/* Get the TIMx CCER register value */
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tmpccer = DCM_TIM->CCER;
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/* Get the TIMx CR2 register value */
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tmpcr2 = DCM_TIM->CR2;
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/* Get the TIMx CCMR1 register value */
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tmpccmrx = DCM_TIM->CCMR2;
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/* Reset the Output Compare Mode Bits */
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tmpccmrx &= ~TIM_CCMR2_OC3M;
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tmpccmrx &= ~TIM_CCMR2_CC3S;
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/* Select the Output Compare Mode */
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tmpccmrx |= TIM_OCMode_PWM1;
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/* Reset the Output Polarity level */
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tmpccer &= ~TIM_CCER_CC3P;
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/* Set the Output Compare Polarity */
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tmpccer |= (TIM_OCPolarity_High << 8);
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/* Reset the Output Compare IDLE State */
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tmpcr2 &= ~TIM_CR2_OIS3;
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/* Set the Output Idle state */
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tmpcr2 |= (TIM_OCIdleState_Reset << 4);
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/* Write to TIMx CR2 */
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DCM_TIM->CR2 = tmpcr2;
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/* Write to TIMx CCMR1 */
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DCM_TIM->CCMR2 = tmpccmrx;
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/* Set the Capture Compare Register value */
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DCM_TIM->CCR3 = 0;
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/* Write to TIMx CCER */
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DCM_TIM->CCER = tmpccer;
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DCM_TIM->CCMR2 |= TIM_CCMR2_OC3PE;
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// 初始化通道 4 输出 PWM
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DCM_TIM->CCER &= ~TIM_CCER_CC4E;
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/* Get the TIMx CCER register value */
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tmpccer = DCM_TIM->CCER;
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/* Get the TIMx CR2 register value */
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tmpcr2 = DCM_TIM->CR2;
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/* Get the TIMx CCMR1 register value */
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tmpccmrx = DCM_TIM->CCMR2;
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/* Reset the Output Compare Mode Bits */
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tmpccmrx &= ~TIM_CCMR2_OC4M;
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tmpccmrx &= ~TIM_CCMR2_CC4S;
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/* Select the Output Compare Mode */
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tmpccmrx |= (TIM_OCMode_PWM1 << 8);
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/* Reset the Output Polarity level */
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tmpccer &= ~TIM_CCER_CC4P;
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/* Set the Output Compare Polarity */
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tmpccer |= (TIM_OCPolarity_High << 12);
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/* Reset the Output Compare IDLE State */
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tmpcr2 &= ~TIM_CR2_OIS4;
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/* Set the Output Idle state */
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tmpcr2 |= (TIM_OCIdleState_Reset << 8);
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/* Write to TIMx CR2 */
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DCM_TIM->CR2 = tmpcr2;
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/* Write to TIMx CCMR1 */
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DCM_TIM->CCMR2 = tmpccmrx;
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/* Set the Capture Compare Register value */
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DCM_TIM->CCR4 = 0;
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/* Write to TIMx CCER */
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DCM_TIM->CCER = tmpccer;
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DCM_TIM->CCMR2 |= TIM_CCMR2_OC4PE;
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DCM_TIM->CCER |= (uint32_t)(TIM_CCER_CC1E);
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DCM_TIM->CCER |= (uint32_t)(TIM_CCER_CC2E);
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DCM_TIM->CCER |= (uint32_t)(TIM_CCER_CC3E);
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DCM_TIM->CCER |= (uint32_t)(TIM_CCER_CC4E);
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}
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static void TIM_DCM_CONFIG2(){
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uint32_t tmpcr1;
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uint32_t tmpccmrx;
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uint32_t tmpccer;
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uint32_t tmpcr2;
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tmpcr1 = DCM_TIM2->CR1;
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tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
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tmpcr1 |= TIM_CounterMode_Up;
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tmpcr1 &= ~TIM_CR1_CKD;
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tmpcr1 |= (uint32_t)TIM_CKD_DIV1;
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tmpcr1 |= (uint32_t)TIM_CR1_ARPE;
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DCM_TIM2->CR1 = tmpcr1;
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/* Set the Autoreload value */
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DCM_TIM2->ARR = (uint32_t)DCM_PERIOD_COUNT - 1;
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/* Set the Prescaler value */
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DCM_TIM2->PSC = DCM_PRESCALER_COUNT - 1;
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DCM_TIM2->EGR = TIM_EGR_UG;
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/*PWM模式配置*/
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// 初始化通道 1 输出 PWM
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DCM_TIM2->CCER &= ~TIM_CCER_CC1E;
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/* Get the TIMx CCER register value */
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tmpccer = DCM_TIM2->CCER;
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/* Get the TIMx CR2 register value */
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tmpcr2 = DCM_TIM2->CR2;
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/* Get the TIMx CCMR1 register value */
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tmpccmrx = DCM_TIM2->CCMR1;
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/* Reset the Output Compare Mode Bits */
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tmpccmrx &= ~TIM_CCMR1_OC1M;
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tmpccmrx &= ~TIM_CCMR1_CC1S;
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/* Select the Output Compare Mode */
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tmpccmrx |= TIM_OCMode_PWM1;
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/* Reset the Output Polarity level */
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tmpccer &= ~TIM_CCER_CC1P;
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/* Set the Output Compare Polarity */
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tmpccer |= TIM_OCPolarity_High;
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/* Reset the Output Compare IDLE State */
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tmpcr2 &= ~TIM_CR2_OIS1;
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/* Set the Output Idle state */
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tmpcr2 |= TIM_OCIdleState_Reset;
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/* Write to TIMx CR2 */
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DCM_TIM2->CR2 = tmpcr2;
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/* Write to TIMx CCMR1 */
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DCM_TIM2->CCMR1 = tmpccmrx;
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/* Set the Capture Compare Register value */
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DCM_TIM2->CCR1 = 0;
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/* Write to TIMx CCER */
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DCM_TIM2->CCER = tmpccer;
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DCM_TIM2->CCMR1 |= TIM_CCMR1_OC1PE;
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// 初始化通道 2 输出 PWM
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DCM_TIM2->CCER &= ~TIM_CCER_CC2E;
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/* Get the TIMx CCER register value */
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tmpccer = DCM_TIM2->CCER;
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/* Get the TIMx CR2 register value */
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tmpcr2 = DCM_TIM2->CR2;
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/* Get the TIMx CCMR1 register value */
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tmpccmrx = DCM_TIM2->CCMR1;
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/* Reset the Output Compare Mode Bits */
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tmpccmrx &= ~TIM_CCMR1_OC2M;
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tmpccmrx &= ~TIM_CCMR1_CC2S;
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/* Select the Output Compare Mode */
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tmpccmrx |= (TIM_OCMode_PWM1 << 8);
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/* Reset the Output Polarity level */
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tmpccer &= ~TIM_CCER_CC2P;
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/* Set the Output Compare Polarity */
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tmpccer |= (TIM_OCPolarity_High << 4);
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/* Reset the Output Compare IDLE State */
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tmpcr2 &= ~TIM_CR2_OIS2;
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/* Set the Output Idle state */
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tmpcr2 |= (TIM_OCIdleState_Reset << 2);
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/* Write to TIMx CR2 */
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DCM_TIM2->CR2 = tmpcr2;
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/* Write to TIMx CCMR1 */
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DCM_TIM2->CCMR1 = tmpccmrx;
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/* Set the Capture Compare Register value */
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DCM_TIM2->CCR2 = 0;
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/* Write to TIMx CCER */
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DCM_TIM2->CCER = tmpccer;
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DCM_TIM2->CCMR1 |= TIM_CCMR1_OC2PE;
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// 初始化通道 3 输出 PWM
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DCM_TIM2->CCER &= ~TIM_CCER_CC3E;
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/* Get the TIMx CCER register value */
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tmpccer = DCM_TIM2->CCER;
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/* Get the TIMx CR2 register value */
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tmpcr2 = DCM_TIM2->CR2;
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/* Get the TIMx CCMR1 register value */
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tmpccmrx = DCM_TIM2->CCMR2;
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/* Reset the Output Compare Mode Bits */
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tmpccmrx &= ~TIM_CCMR2_OC3M;
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tmpccmrx &= ~TIM_CCMR2_CC3S;
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/* Select the Output Compare Mode */
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tmpccmrx |= TIM_OCMode_PWM1;
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/* Reset the Output Polarity level */
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tmpccer &= ~TIM_CCER_CC3P;
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/* Set the Output Compare Polarity */
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tmpccer |= (TIM_OCPolarity_High << 8);
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/* Reset the Output Compare IDLE State */
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tmpcr2 &= ~TIM_CR2_OIS3;
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/* Set the Output Idle state */
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tmpcr2 |= (TIM_OCIdleState_Reset << 4);
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/* Write to TIMx CR2 */
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DCM_TIM2->CR2 = tmpcr2;
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/* Write to TIMx CCMR1 */
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DCM_TIM2->CCMR2 = tmpccmrx;
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/* Set the Capture Compare Register value */
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DCM_TIM2->CCR3 = 0;
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/* Write to TIMx CCER */
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DCM_TIM2->CCER = tmpccer;
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DCM_TIM2->CCMR2 |= TIM_CCMR2_OC3PE;
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// 初始化通道 4 输出 PWM
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DCM_TIM2->CCER &= ~TIM_CCER_CC4E;
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/* Get the TIMx CCER register value */
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tmpccer = DCM_TIM2->CCER;
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/* Get the TIMx CR2 register value */
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tmpcr2 = DCM_TIM2->CR2;
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/* Get the TIMx CCMR1 register value */
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tmpccmrx = DCM_TIM2->CCMR2;
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/* Reset the Output Compare Mode Bits */
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tmpccmrx &= ~TIM_CCMR2_OC4M;
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tmpccmrx &= ~TIM_CCMR2_CC4S;
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/* Select the Output Compare Mode */
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tmpccmrx |= (TIM_OCMode_PWM1 << 8);
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/* Reset the Output Polarity level */
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tmpccer &= ~TIM_CCER_CC4P;
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/* Set the Output Compare Polarity */
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tmpccer |= (TIM_OCPolarity_High << 12);
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/* Reset the Output Compare IDLE State */
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tmpcr2 &= ~TIM_CR2_OIS4;
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/* Set the Output Idle state */
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tmpcr2 |= (TIM_OCIdleState_Reset << 8);
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/* Write to TIMx CR2 */
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DCM_TIM2->CR2 = tmpcr2;
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/* Write to TIMx CCMR1 */
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DCM_TIM2->CCMR2 = tmpccmrx;
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/* Set the Capture Compare Register value */
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DCM_TIM2->CCR4 = 0;
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/* Write to TIMx CCER */
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DCM_TIM2->CCER = tmpccer;
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DCM_TIM2->CCMR2 |= TIM_CCMR2_OC4PE;
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DCM_TIM2->CCER |= (uint32_t)(TIM_CCER_CC1E);
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DCM_TIM2->CCER |= (uint32_t)(TIM_CCER_CC2E);
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DCM_TIM2->CCER |= (uint32_t)(TIM_CCER_CC3E);
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DCM_TIM2->CCER |= (uint32_t)(TIM_CCER_CC4E);
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}
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static void set_motor_speed(uint32_t channel)
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{
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if (direction == DCM_MOTOR_FWD)
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{
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switch(channel){
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case 1: DCM_TIM->CCR2 = 0; DCM_TIM->CCR1 = dutyfactor; break;
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case 2: DCM_TIM->CCR4 = 0; DCM_TIM->CCR3 = dutyfactor; break;
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case 3: DCM_TIM2->CCR2 = 0; DCM_TIM2->CCR1 = dutyfactor; break;
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case 4: DCM_TIM2->CCR4 = 0; DCM_TIM2->CCR3 = dutyfactor; break;
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}
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}
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else
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{
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switch(channel){
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case 1: DCM_TIM->CCR1 = 0; DCM_TIM->CCR2 = dutyfactor; break;
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case 2: DCM_TIM->CCR3 = 0; DCM_TIM->CCR4 = dutyfactor; break;
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case 3: DCM_TIM2->CCR1 = 0; DCM_TIM2->CCR2 = dutyfactor; break;
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case 4: DCM_TIM2->CCR3 = 0; DCM_TIM2->CCR4 = dutyfactor; break;
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}
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}
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}
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extern void irq_motor_init(int index);
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static int tim_dcm_test(void)
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{
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printf("\n\rDCM TEST\n\r");
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GPIO_Configuration();
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GPIO_Configuration_DCM();
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GPIO_Configuration_DCM2();
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TIM_DCM_CONFIG();
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TIM_DCM_CONFIG2();
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dcm_mode = DCM_FOUR;
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irq_motor_init(0);
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while(1){
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if(scan_key(KEY0)){
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printf("start\n\r");
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DCM_TIM->BDTR|=(TIM_BDTR_MOE);
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DCM_TIM->CR1|=TIM_CR1_CEN;
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DCM_TIM2->CR1|=TIM_CR1_CEN;
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break;
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}
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}
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return 0;
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}
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int tim_dcm(int argc, void *argv[])
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{
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tim_dcm_test();
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return 0;
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}
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int speed_set_dcm(int argc, void *argv[])
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{
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if (argc != 4)
|
|
{
|
|
printf("\n usage: speed set <channel:1-4> <dir:0/1> <speed:0-900>\n");
|
|
return 1;
|
|
}
|
|
|
|
uint32_t channel = str2num(argv[1]);
|
|
uint32_t dir = str2num(argv[2]);
|
|
uint32_t speed = str2num(argv[3]);
|
|
|
|
if(dcm_mode != DCM_FOUR){
|
|
printf("\nNOT IN FOUR MOTOR MODE!\n\r");
|
|
return 0;
|
|
}
|
|
|
|
if(speed > 900){
|
|
speed = 900;
|
|
}
|
|
else if(speed < 0){
|
|
speed = 0;
|
|
}
|
|
|
|
if(dir == 0){
|
|
direction = DCM_MOTOR_FWD;
|
|
}
|
|
else{
|
|
direction = DCM_MOTOR_REV;
|
|
}
|
|
|
|
dutyfactor = speed;
|
|
|
|
if (direction == DCM_MOTOR_FWD)
|
|
{
|
|
switch(channel){
|
|
case 1: DCM_TIM->CCR2 = 0; DCM_TIM->CCR1 = dutyfactor; break;
|
|
case 2: DCM_TIM->CCR4 = 0; DCM_TIM->CCR3 = dutyfactor; break;
|
|
case 3: DCM_TIM2->CCR2 = 0; DCM_TIM2->CCR1 = dutyfactor; break;
|
|
case 4: DCM_TIM2->CCR4 = 0; DCM_TIM2->CCR3 = dutyfactor; break;
|
|
}
|
|
}
|
|
else
|
|
{
|
|
switch(channel){
|
|
case 1: DCM_TIM->CCR1 = 0; DCM_TIM->CCR2 = dutyfactor; break;
|
|
case 2: DCM_TIM->CCR3 = 0; DCM_TIM->CCR4 = dutyfactor; break;
|
|
case 3: DCM_TIM2->CCR1 = 0; DCM_TIM2->CCR2 = dutyfactor; break;
|
|
case 4: DCM_TIM2->CCR3 = 0; DCM_TIM2->CCR4 = dutyfactor; break;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
int speed_keyset_dcm(int argc, void *argv[])
|
|
{
|
|
if (argc != 2)
|
|
{
|
|
printf("\n usage: speed set <channel:1-4>\n");
|
|
return 1;
|
|
}
|
|
|
|
uint32_t channel = str2num(argv[1]);
|
|
volatile int ChannelPulse = 0;
|
|
int i = 0;
|
|
direction = DCM_MOTOR_FWD; // dir
|
|
dutyfactor = 0;
|
|
|
|
if(dcm_mode != DCM_FOUR){
|
|
printf("\nNOT IN FOUR MOTOR MODE!\n\r");
|
|
return 0;
|
|
}
|
|
|
|
while(1){
|
|
if(scan_key(KEY0)){
|
|
ChannelPulse += 20;
|
|
if(ChannelPulse > 900){
|
|
ChannelPulse = 900;
|
|
}
|
|
if(ChannelPulse >= 0){
|
|
dutyfactor = ChannelPulse;
|
|
direction = DCM_MOTOR_FWD;
|
|
}
|
|
else{
|
|
dutyfactor = -ChannelPulse;
|
|
direction = DCM_MOTOR_REV;
|
|
}
|
|
set_motor_speed(channel);
|
|
}
|
|
else if (scan_key(KEY1)){
|
|
ChannelPulse -= 20;
|
|
if(ChannelPulse < -900){
|
|
ChannelPulse = -900;
|
|
}
|
|
if(ChannelPulse >= 0){
|
|
dutyfactor = ChannelPulse;
|
|
direction = DCM_MOTOR_FWD;
|
|
}
|
|
else{
|
|
dutyfactor = -ChannelPulse;
|
|
direction = DCM_MOTOR_REV;
|
|
}
|
|
set_motor_speed(channel);
|
|
}
|
|
|
|
|
|
|
|
|
|
char c;
|
|
c = x_getchar();
|
|
if (c == 0x3) break;
|
|
i++;
|
|
if(i==100000){
|
|
i = 0;
|
|
printf(".");
|
|
}
|
|
}
|
|
|
|
|
|
return 0;
|
|
}
|
|
|
|
int tim_set_dcm(int argc, void *argv[])
|
|
{
|
|
if (argc != 4)
|
|
{
|
|
printf("\n usage: tim set <0:atim/1:gtim> <psc> <arr>\n");
|
|
return 1;
|
|
}
|
|
|
|
uint32_t tim_choice = str2num(argv[1]);
|
|
uint32_t psc_in = str2num(argv[2]);
|
|
uint32_t arr_in = str2num(argv[2]);
|
|
uint32_t data;
|
|
|
|
|
|
switch(tim_choice){
|
|
case 1: DCM_TIM->PSC = psc_in; DCM_TIM->ARR = arr_in; break;
|
|
case 2: TIM2->PSC = psc_in; TIM2->ARR = arr_in; break;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
|
|
|
|
|
|
|