289 lines
18 KiB
C
289 lines
18 KiB
C
/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __LS1C103_ADC_H
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#define __LS1C103_ADC_H
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/* Includes ------------------------------------------------------------------*/
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#include "ls1c103_map.h"
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/* Exported types ------------------------------------------------------------*/
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/* ADC Init structure definition */
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typedef struct
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{
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uint32_t ADC_Mode;
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FunctionalState ADC_ScanConvMode;
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FunctionalState ADC_ContinuousConvMode;
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uint32_t ADC_ExternalTrigConv;
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uint32_t ADC_DataAlign;
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uint8_t ADC_NbrOfChannel;
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uint8_t ADC_ClkDivider;
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uint8_t ADC_JTrigMod;
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uint8_t ADC_ADCEdge;
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uint8_t ADC_OutPhaseSel;
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}ADC_InitTypeDef;
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/* Exported constants --------------------------------------------------------*/
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#define IS_ADC_ALL_PERIPH(PERIPH) (((*(uint32_t*)&(PERIPH)) == ADC1_BASE) || \
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((*(uint32_t*)&(PERIPH)) == ADC2_BASE) || \
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((*(uint32_t*)&(PERIPH)) == ADC3_BASE))
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#define IS_ADC_DMA_PERIPH(PERIPH) (((*(uint32_t*)&(PERIPH)) == ADC1_BASE) || \
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((*(uint32_t*)&(PERIPH)) == ADC3_BASE))
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/* ADC dual mode -------------------------------------------------------------*/
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#define ADC_Mode_Independent ((uint32_t)0x00000000)
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#define ADC_Mode_RegInjecSimult ((uint32_t)0x00010000)
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#define ADC_Mode_RegSimult_AlterTrig ((uint32_t)0x00020000)
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#define ADC_Mode_InjecSimult_FastInterl ((uint32_t)0x00030000)
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#define ADC_Mode_InjecSimult_SlowInterl ((uint32_t)0x00040000)
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#define ADC_Mode_InjecSimult ((uint32_t)0x00050000)
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#define ADC_Mode_RegSimult ((uint32_t)0x00060000)
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#define ADC_Mode_FastInterl ((uint32_t)0x00070000)
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#define ADC_Mode_SlowInterl ((uint32_t)0x00080000)
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#define ADC_Mode_AlterTrig ((uint32_t)0x00090000)
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#define IS_ADC_MODE(MODE) (((MODE) == ADC_Mode_Independent) || \
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((MODE) == ADC_Mode_RegInjecSimult) || \
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((MODE) == ADC_Mode_RegSimult_AlterTrig) || \
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((MODE) == ADC_Mode_InjecSimult_FastInterl) || \
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((MODE) == ADC_Mode_InjecSimult_SlowInterl) || \
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((MODE) == ADC_Mode_InjecSimult) || \
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((MODE) == ADC_Mode_RegSimult) || \
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((MODE) == ADC_Mode_FastInterl) || \
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((MODE) == ADC_Mode_SlowInterl) || \
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((MODE) == ADC_Mode_AlterTrig))
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/* ADC extrenal trigger sources for regular channels conversion --------------*/
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/* for ADC1 and ADC2 */
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#define ADC_ExternalTrigConv_T1_CC1 ((uint32_t)0x00000000)
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#define ADC_ExternalTrigConv_T1_CC2 ((uint32_t)0x00020000)
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#define ADC_ExternalTrigConv_T2_CC2 ((uint32_t)0x00060000)
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#define ADC_ExternalTrigConv_T3_TRGO ((uint32_t)0x00080000)
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#define ADC_ExternalTrigConv_T4_CC4 ((uint32_t)0x000A0000)
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#define ADC_ExternalTrigConv_Ext_IT11_TIM8_TRGO ((uint32_t)0x000C0000)
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/* for ADC1, ADC2 and ADC3 */
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#define ADC_ExternalTrigConv_T1_CC3 ((uint32_t)0x00040000)
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#define ADC_ExternalTrigConv_None ((uint32_t)0x000E0000)
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/* for ADC3 */
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#define ADC_ExternalTrigConv_T3_CC1 ((uint32_t)0x00000000)
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#define ADC_ExternalTrigConv_T2_CC3 ((uint32_t)0x00020000)
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#define ADC_ExternalTrigConv_T8_CC1 ((uint32_t)0x00060000)
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#define ADC_ExternalTrigConv_T8_TRGO ((uint32_t)0x00080000)
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#define ADC_ExternalTrigConv_T5_CC1 ((uint32_t)0x000A0000)
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#define ADC_ExternalTrigConv_T5_CC3 ((uint32_t)0x000C0000)
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#define IS_ADC_EXT_TRIG(REGTRIG) (((REGTRIG) == ADC_ExternalTrigConv_T1_CC1) || \
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((REGTRIG) == ADC_ExternalTrigConv_T1_CC2) || \
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((REGTRIG) == ADC_ExternalTrigConv_T1_CC3) || \
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((REGTRIG) == ADC_ExternalTrigConv_T2_CC2) || \
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((REGTRIG) == ADC_ExternalTrigConv_T3_TRGO) || \
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((REGTRIG) == ADC_ExternalTrigConv_T4_CC4) || \
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((REGTRIG) == ADC_ExternalTrigConv_Ext_IT11_TIM8_TRGO) || \
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((REGTRIG) == ADC_ExternalTrigConv_None) || \
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((REGTRIG) == ADC_ExternalTrigConv_T3_CC1) || \
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((REGTRIG) == ADC_ExternalTrigConv_T2_CC3) || \
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((REGTRIG) == ADC_ExternalTrigConv_T8_CC1) || \
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((REGTRIG) == ADC_ExternalTrigConv_T8_TRGO) || \
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((REGTRIG) == ADC_ExternalTrigConv_T5_CC1) || \
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((REGTRIG) == ADC_ExternalTrigConv_T5_CC3))
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/* ADC data align ------------------------------------------------------------*/
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#define ADC_DataAlign_Right ((uint32_t)0x00000000)
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#define ADC_DataAlign_Left ((uint32_t)0x00000800)
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#define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DataAlign_Right) || \
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((ALIGN) == ADC_DataAlign_Left))
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/* ADC channels --------------------------------------------------------------*/
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#define ADC_Channel_0 ((uint8_t)0x00)
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#define ADC_Channel_1 ((uint8_t)0x01)
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#define ADC_Channel_2 ((uint8_t)0x02)
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#define ADC_Channel_3 ((uint8_t)0x03)
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#define ADC_Channel_4 ((uint8_t)0x04)
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#define ADC_Channel_5 ((uint8_t)0x05)
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#define ADC_Channel_6 ((uint8_t)0x06)
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#define ADC_Channel_7 ((uint8_t)0x07)
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#define ADC_Channel_8 ((uint8_t)0x08)
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#define ADC_Channel_9 ((uint8_t)0x09)
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#define ADC_Channel_10 ((uint8_t)0x0A)
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#define ADC_Channel_11 ((uint8_t)0x0B)
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#define ADC_Channel_12 ((uint8_t)0x0C)
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#define ADC_Channel_13 ((uint8_t)0x0D)
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#define ADC_Channel_14 ((uint8_t)0x0E)
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#define ADC_Channel_15 ((uint8_t)0x0F)
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#define ADC_Channel_16 ((uint8_t)0x10)
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#define ADC_Channel_17 ((uint8_t)0x11)
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#define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) == ADC_Channel_0) || ((CHANNEL) == ADC_Channel_1) || \
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((CHANNEL) == ADC_Channel_2) || ((CHANNEL) == ADC_Channel_3) || \
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((CHANNEL) == ADC_Channel_4) || ((CHANNEL) == ADC_Channel_5) || \
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((CHANNEL) == ADC_Channel_6) || ((CHANNEL) == ADC_Channel_7) || \
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((CHANNEL) == ADC_Channel_8) || ((CHANNEL) == ADC_Channel_9) || \
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((CHANNEL) == ADC_Channel_10) || ((CHANNEL) == ADC_Channel_11) || \
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((CHANNEL) == ADC_Channel_12) || ((CHANNEL) == ADC_Channel_13) || \
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((CHANNEL) == ADC_Channel_14) || ((CHANNEL) == ADC_Channel_15) || \
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((CHANNEL) == ADC_Channel_16) || ((CHANNEL) == ADC_Channel_17))
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/* ADC sampling times --------------------------------------------------------*/
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#define ADC_SampleTime_1Cycles ((uint8_t)0x00)
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#define ADC_SampleTime_2Cycles ((uint8_t)0x01)
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#define ADC_SampleTime_4Cycles ((uint8_t)0x02)
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#define ADC_SampleTime_8Cycles ((uint8_t)0x03)
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#define ADC_SampleTime_16Cycles ((uint8_t)0x04)
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#define ADC_SampleTime_32Cycles ((uint8_t)0x05)
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#define ADC_SampleTime_64Cycles ((uint8_t)0x06)
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#define ADC_SampleTime_128Cycles ((uint8_t)0x07)
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#define IS_ADC_SAMPLE_TIME(TIME) (((TIME) == ADC_SampleTime_1Cycles5) || \
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((TIME) == ADC_SampleTime_2Cycles5) || \
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((TIME) == ADC_SampleTime_4Cycles5) || \
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((TIME) == ADC_SampleTime_8Cycles5) || \
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((TIME) == ADC_SampleTime_16Cycles5) || \
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((TIME) == ADC_SampleTime_32Cycles5) || \
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((TIME) == ADC_SampleTime_64Cycles5) || \
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((TIME) == ADC_SampleTime_128Cycles5))
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/* ADC extrenal trigger sources for injected channels conversion -------------*/
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/* For ADC1 and ADC2 */
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#define ADC_ExternalTrigInjecConv_T2_TRGO ((uint32_t)0x00002000)
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#define ADC_ExternalTrigInjecConv_T2_CC1 ((uint32_t)0x00003000)
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#define ADC_ExternalTrigInjecConv_T3_CC4 ((uint32_t)0x00004000)
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#define ADC_ExternalTrigInjecConv_T4_TRGO ((uint32_t)0x00005000)
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#define ADC_ExternalTrigInjecConv_Ext_IT15_TIM8_CC4 ((uint32_t)0x00006000)
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/* For ADC1, ADC2 and ADC3 */
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#define ADC_ExternalTrigInjecConv_T1_TRGO ((uint32_t)0x00000000)
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#define ADC_ExternalTrigInjecConv_T1_CC4 ((uint32_t)0x00001000)
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#define ADC_ExternalTrigInjecConv_None ((uint32_t)0x00007000)
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/* For ADC3 */
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#define ADC_ExternalTrigInjecConv_T4_CC3 ((uint32_t)0x00002000)
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#define ADC_ExternalTrigInjecConv_T8_CC2 ((uint32_t)0x00003000)
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#define ADC_ExternalTrigInjecConv_T8_CC4 ((uint32_t)0x00004000)
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#define ADC_ExternalTrigInjecConv_T5_TRGO ((uint32_t)0x00005000)
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#define ADC_ExternalTrigInjecConv_T5_CC4 ((uint32_t)0x00006000)
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#define IS_ADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == ADC_ExternalTrigInjecConv_T1_TRGO) || \
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((INJTRIG) == ADC_ExternalTrigInjecConv_T1_CC4) || \
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((INJTRIG) == ADC_ExternalTrigInjecConv_T2_TRGO) || \
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((INJTRIG) == ADC_ExternalTrigInjecConv_T2_CC1) || \
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((INJTRIG) == ADC_ExternalTrigInjecConv_T3_CC4) || \
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((INJTRIG) == ADC_ExternalTrigInjecConv_T4_TRGO) || \
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((INJTRIG) == ADC_ExternalTrigInjecConv_Ext_IT15_TIM8_CC4) || \
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((INJTRIG) == ADC_ExternalTrigInjecConv_None) || \
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((INJTRIG) == ADC_ExternalTrigInjecConv_T4_CC3) || \
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((INJTRIG) == ADC_ExternalTrigInjecConv_T8_CC2) || \
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((INJTRIG) == ADC_ExternalTrigInjecConv_T8_CC4) || \
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((INJTRIG) == ADC_ExternalTrigInjecConv_T5_TRGO) || \
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((INJTRIG) == ADC_ExternalTrigInjecConv_T5_CC4))
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/* ADC injected channel selection --------------------------------------------*/
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#define ADC_InjectedChannel_1 ((uint8_t)0x14)
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#define ADC_InjectedChannel_2 ((uint8_t)0x18)
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#define ADC_InjectedChannel_3 ((uint8_t)0x1C)
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#define ADC_InjectedChannel_4 ((uint8_t)0x20)
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#define IS_ADC_INJECTED_CHANNEL(CHANNEL) (((CHANNEL) == ADC_InjectedChannel_1) || \
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((CHANNEL) == ADC_InjectedChannel_2) || \
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((CHANNEL) == ADC_InjectedChannel_3) || \
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((CHANNEL) == ADC_InjectedChannel_4))
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/* ADC analog watchdog selection ---------------------------------------------*/
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#define ADC_AnalogWatchdog_SingleRegEnable ((uint32_t)0x00800200)
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#define ADC_AnalogWatchdog_SingleInjecEnable ((uint32_t)0x00400200)
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#define ADC_AnalogWatchdog_SingleRegOrInjecEnable ((uint32_t)0x00C00200)
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#define ADC_AnalogWatchdog_AllRegEnable ((uint32_t)0x00800000)
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#define ADC_AnalogWatchdog_AllInjecEnable ((uint32_t)0x00400000)
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#define ADC_AnalogWatchdog_AllRegAllInjecEnable ((uint32_t)0x00C00000)
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#define ADC_AnalogWatchdog_None ((uint32_t)0x00000000)
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#define IS_ADC_ANALOG_WATCHDOG(WATCHDOG) (((WATCHDOG) == ADC_AnalogWatchdog_SingleRegEnable) || \
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((WATCHDOG) == ADC_AnalogWatchdog_SingleInjecEnable) || \
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((WATCHDOG) == ADC_AnalogWatchdog_SingleRegOrInjecEnable) || \
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((WATCHDOG) == ADC_AnalogWatchdog_AllRegEnable) || \
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((WATCHDOG) == ADC_AnalogWatchdog_AllInjecEnable) || \
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((WATCHDOG) == ADC_AnalogWatchdog_AllRegAllInjecEnable) || \
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((WATCHDOG) == ADC_AnalogWatchdog_None))
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/* ADC interrupts definition -------------------------------------------------*/
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#define ADC_IT_EOC ((uint16_t)0x0220)
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#define ADC_IT_AWD ((uint16_t)0x0140)
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#define ADC_IT_JEOC ((uint16_t)0x0480)
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#define IS_ADC_IT(IT) ((((IT) & (uint16_t)0xF81F) == 0x00) && ((IT) != 0x00))
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#define IS_ADC_GET_IT(IT) (((IT) == ADC_IT_EOC) || ((IT) == ADC_IT_AWD) || \
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((IT) == ADC_IT_JEOC))
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/* ADC flags definition ------------------------------------------------------*/
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#define ADC_FLAG_AWD ((uint8_t)0x01)
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#define ADC_FLAG_EOC ((uint8_t)0x02)
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#define ADC_FLAG_JEOC ((uint8_t)0x04)
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#define ADC_FLAG_JSTRT ((uint8_t)0x08)
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#define ADC_FLAG_STRT ((uint8_t)0x10)
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#define IS_ADC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint8_t)0xE0) == 0x00) && ((FLAG) != 0x00))
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#define IS_ADC_GET_FLAG(FLAG) (((FLAG) == ADC_FLAG_AWD) || ((FLAG) == ADC_FLAG_EOC) || \
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((FLAG) == ADC_FLAG_JEOC) || ((FLAG)== ADC_FLAG_JSTRT) || \
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((FLAG) == ADC_FLAG_STRT))
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/* ADC thresholds ------------------------------------------------------------*/
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#define IS_ADC_THRESHOLD(THRESHOLD) ((THRESHOLD) <= 0xFFF)
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/* ADC injected offset -------------------------------------------------------*/
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#define IS_ADC_OFFSET(OFFSET) ((OFFSET) <= 0xFFF)
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/* ADC injected length -------------------------------------------------------*/
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#define IS_ADC_INJECTED_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x4))
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/* ADC injected rank ---------------------------------------------------------*/
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#define IS_ADC_INJECTED_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x4))
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/* ADC regular length --------------------------------------------------------*/
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#define IS_ADC_REGULAR_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x10))
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/* ADC regular rank ----------------------------------------------------------*/
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#define IS_ADC_REGULAR_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x10))
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/* ADC regular discontinuous mode number -------------------------------------*/
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#define IS_ADC_REGULAR_DISC_NUMBER(NUMBER) (((NUMBER) >= 0x1) && ((NUMBER) <= 0x8))
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/* Exported macro ------------------------------------------------------------*/
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/* Exported functions ------------------------------------------------------- */
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void ADC_DeInit(ADC_TypeDef* ADCx);
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void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct);
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void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct);
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void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState);
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void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState);
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void ADC_ITConfig(ADC_TypeDef* ADCx, uint16_t ADC_IT, FunctionalState NewState);
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void ADC_ResetCalibration(ADC_TypeDef* ADCx);
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FlagStatus ADC_GetResetCalibrationStatus(ADC_TypeDef* ADCx);
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void ADC_StartCalibration(ADC_TypeDef* ADCx);
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FlagStatus ADC_GetCalibrationStatus(ADC_TypeDef* ADCx);
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void ADC_SoftwareStartConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
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FlagStatus ADC_GetSoftwareStartConvStatus(ADC_TypeDef* ADCx);
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void ADC_DiscModeChannelCountConfig(ADC_TypeDef* ADCx, uint8_t Number);
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void ADC_DiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
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void ADC_TestChannelMap(uint8_t ADC_Channel, uint8_t ADC_DOUT);
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void ADC_RegularChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime);
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void ADC_ExternalTrigConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
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uint16_t ADC_GetConversionValue(ADC_TypeDef* ADCx);
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uint32_t ADC_GetDualModeConversionValue(void);
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void ADC_AutoInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
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void ADC_InjectedDiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
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void ADC_ExternalTrigInjectedConvConfig(ADC_TypeDef* ADCx, uint32_t ADC_ExternalTrigInjecConv);
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void ADC_ExternalTrigInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
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void ADC_SoftwareStartInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
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FlagStatus ADC_GetSoftwareStartInjectedConvCmdStatus(ADC_TypeDef* ADCx);
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void ADC_InjectedChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime);
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void ADC_InjectedSequencerLengthConfig(ADC_TypeDef* ADCx, uint8_t Length);
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void ADC_SetInjectedOffset(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel, uint16_t Offset);
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uint16_t ADC_GetInjectedConversionValue(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel);
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void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx, uint32_t ADC_AnalogWatchdog);
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void ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef* ADCx, uint16_t HighThreshold, uint16_t LowThreshold);
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void ADC_AnalogWatchdogSingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel);
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void ADC_TempSensorVrefintCmd(FunctionalState NewState);
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FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, uint8_t ADC_FLAG);
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void ADC_ClearFlag(ADC_TypeDef* ADCx, uint8_t ADC_FLAG);
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ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, uint16_t ADC_IT);
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void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, uint16_t ADC_IT);
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#endif
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