186 lines
4.3 KiB
ArmAsm
Executable File
186 lines
4.3 KiB
ArmAsm
Executable File
#include "regdef.h"
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#include "csrdef.h"
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#include "tools-asm.h"
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#include "start.h"
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/* start address for the initialization values of the .data section. defined in ld.script */
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.word _sidata
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/* start address for the .data section. defined in ld.script */
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.word _sdata
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/* end address for the .data section. defined in ld.script */
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.word _edata
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/* start address for the .bss section. defined in ld.script */
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.word _sbss
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/* end address for the .bss section. defined in ld.script */
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.word _ebss
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.globl _RAM_BSS
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_RAM_BSS = BSS_BASE
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.globl _RAM_DATA
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_RAM_DATA = DATA_BASE
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.section .text._start # begin code segment
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.weak _start
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.type _start, %function
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.globl _start
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#All Exception Entries
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_start:
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move t1 , zero
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b LoopCopyDataInit
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CopyDataInit:
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la.abs t3, _sidata
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add.w t4, t3, t1
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ld.w t3, t4, 0x0
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add.w t4, t0, t1
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st.w t3, t4, 0x0
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addi.w t1, t1, 0x4
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LoopCopyDataInit:
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la.abs t0, _sdata
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la.abs t3, _edata
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add.w t2, t0, t1
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bne t2, t3, CopyDataInit
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/* clear bss */
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la.abs t0, _sbss
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la.abs t1, _ebss
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beq t1, t0, cpu_init_start
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LoopFillZerobss:
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st.w zero, t0, 0
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addi.w t0, t0, 4
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bne t1, t0, LoopFillZerobss
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#set up basic system function
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/* cpu init*/
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cpu_init_start:
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### reset normal exception base and Ex config
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li.w t0, 0x1c001000
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csrwr t0, CSR_EBase
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li.w t0, (0<<S_CSR_ExConfig_VS)|(0x0000<<S_CSR_ExConfig_IM) # 4 instruction gap
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csrwr t0, CSR_ExConfig
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#set int masks
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li.w t0, 0x1fff
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csrxchg t0, t0, CSR_ExConfig
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##set VSEG4(0x80000000~0x9fffffff) to cached, other VSEG to uncached
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li.w t0, CACHE_OP
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csrwr t0, CSR_SEGCA
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##set VSEG4(0x80000000~0x9fffffff) to PSEG0(0x00000000~0x1fffffff), other VSEG unchanged
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li.w t0, ADDR_MAP
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csrwr t0, CSR_SEGPA
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##set DA=0(change DA-mode to AD-mode)
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li.w t0, 0x8
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csrxchg zero, t0, CSR_CRMD
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li.w sp, SP_BASE
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bl main
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jirl zero, ra, 0
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.globl cpu_wait
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cpu_wait:
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idle 0
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jr ra
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.org 0x1000
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DEFAULT_INT_HANDLER:
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SAVE_REGS_FAST(REGS_MEM)
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csrrd t0, CSR_ExStatus
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andi t1, t0, INT_VECTOR
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beqz t1, exception_core_check
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exception_pmu:
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#if defined (LS1C102)
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andi t1,t0,0x4
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bnez t1,wake_label
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andi t1,t0,0x8
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bnez t1,touch_label
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andi t1,t0,0x10
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bnez t1,uart2_label
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andi t1,t0,0x20
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bnez t1,bcc_label
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andi t1,t0,0x80
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bnez t1,exint_label
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andi t1,t0,0x800
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bnez t1,timer_label
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wake_label:
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bl TIMER_WAKE_INT
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b exception_exit
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touch_label:
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bl TOUCH
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b exception_exit
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uart2_label:
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bl UART2_INT
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b exception_exit
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bcc_label:
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bl BAT_FAIL
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b exception_exit
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exint_label:
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bl ext_handler
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b exception_exit
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timer_label:
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bl TIMER_HANDLER
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b exception_exit
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#elif defined (LS1C103)
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andi t1,t0,0x4
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bnez t1,atim_label /*EX_EXT_INT0*/
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andi t1,t0,0x8
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bnez t1,gtim_label /*EX_EXT_INT1*/
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andi t1,t0,0x10
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bnez t1,adc_label /*EX_EXT_INT2*/
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andi t1,t0,0x40
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bnez t1,pmu_label /*EX_EXT_INT4*/
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andi t1,t0,0x80
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bnez t1,exint_label /*EX_EXT_INT5*/
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andi t1,t0,0x800
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bnez t1,timer_label
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atim_label:
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bl atim_handler
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b exception_exit
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gtim_label:
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bl gtim_handler
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b exception_exit
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adc_label:
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bl adc_handler
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b exception_exit
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pmu_label:
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bl pmu_handler
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b exception_exit
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exint_label:
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bl ext_handler
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b exception_exit
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timer_label:
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bl TIMER_HANDLER
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b exception_exit
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#endif
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exception_core_check:
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andi t1, t0, INTC_VECTOR
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beqz t1, exception_exit
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bl intc_handler
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b exception_exit
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exception_exit:
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RESTORE_REGS_FAST(REGS_MEM)
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ertn
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