315 lines
9.8 KiB
C
315 lines
9.8 KiB
C
#ifndef _CSRDEF_H
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#define _CSRDEF_H
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#define CSR_CRMD 0x0
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#define CSR_PRMD 0x1
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#define CSR_CU 0x2
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#define CSR_Config 0x3
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#define CSR_ExConfig 0x4
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#define CSR_ExStatus 0x5
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#define CSR_EPC 0x6
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#define CSR_BadVAddr 0x7
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#define CSR_EBase 0xc
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#define CSR_ASID 0x18
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#define CSR_CPUN 0x20
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#define CSR_Config1 0x21
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#define CSR_KScratch0 0x30
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#define CSR_KScratch1 0x31
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#define CSR_TimerID 0x40
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#define CSR_TimerConfig 0x41
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#define CSR_TimerTicks 0x42
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#define CSR_TimerOffset 0x43
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#define CSR_TimerClear 0x44
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#define CSR_LLBit 0x60
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#define CSR_GSConfig 0x80
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#define CSR_ERRCTL 0x90
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#define CSR_ERRINFO 0x91
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#define CSR_ERRINFO1 0x92
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#define CSR_ERRBase 0x93
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#define CSR_ERREPC 0x94
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#define CSR_CCSF 0x96 //only-132e
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#define CSR_TAGLO 0x98
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#define CSR_USERDEF 0xaf //only-132e
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#define CSR_ELUSION 0xff //only-132e
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#define CSR_MPU0_BASE 0x180 //only-132e
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#define CSR_MPU0_MASK 0x181
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#define CSR_MPU1_BASE 0x184
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#define CSR_MPU1_MASK 0x185
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#define CSR_MPU2_BASE 0x188
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#define CSR_MPU2_MASK 0x189
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#define CSR_MPU3_BASE 0x18c
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#define CSR_MPU3_MASK 0x18d
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#define CSR_SEGPA 0x190
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#define CSR_SEGCA 0x191
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#define CSR_DBConfig 0x300
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#define CSR_DBState 0x301
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#define CSR_DBA 0x310
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#define CSR_DBM 0x311
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#define CSR_DBC 0x312
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#define CSR_DBT 0x313
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#define CSR_IBConfig 0x380
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#define CSR_IBState 0x381
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#define CSR_IBA 0x390
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#define CSR_IBM 0x391
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#define CSR_IBC 0x392
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#define CSR_IBT 0x393
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#define CSR_DEBUG 0x500
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#define CSR_DESAVE 0x501
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#define CSR_DEPC 0x502
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#define CSR_DEBUG2 0x508 //only-132e
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//S_* menas shift
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//W_* menas width
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//M_* menas mask
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//0x0 CSR_CRMD
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#define S_CSR_CRMD_PLV 0
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#define W_CSR_CRMD_PLV 2
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#define M_CSR_CRMD_PLV (((1<<W_CSR_CRMD_PLV)-1)<<S_CSR_CRMD_PLV)
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#define S_CSR_CRMD_IE 2
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#define W_CSR_CRMD_IE 1
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#define M_CSR_CRMD_IE (((1<<W_CSR_CRMD_IE)-1)<<S_CSR_CRMD_IE)
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#define S_CSR_CRMD_DA 3
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#define W_CSR_CRMD_DA 1
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#define M_CSR_CRMD_DA (((1<<W_CSR_CRMD_DA)-1)<<S_CSR_CRMD_DA)
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#define S_CSR_CRMD_PG 4
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#define W_CSR_CRMD_PG 1
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#define M_CSR_CRMD_PG (((1<<W_CSR_CRMD_PG)-1)<<S_CSR_CRMD_PG)
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#define S_CSR_CRMD_DACF 5
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#define W_CSR_CRMD_DACF 2
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#define M_CSR_CRMD_DACF (((1<<W_CSR_CRMD_DACF)-1)<<S_CSR_CRMD_DACF)
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#define S_CSR_CRMD_DACM 7
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#define W_CSR_CRMD_DACM 2
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#define M_CSR_CRMD_DACM (((1<<W_CSR_CRMD_DACM)-1)<<S_CSR_CRMD_DACM)
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#define S_CSR_CRMD_WE 9
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#define W_CSR_CRMD_WE 1
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#define M_CSR_CRMD_WE (((1<<W_CSR_CRMD_WE)-1)<<S_CSR_CRMD_WE)
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//0x1 CSR_PRMD
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#define S_CSR_PRMD_PPLV 0
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#define W_CSR_PRMD_PPLV 2
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#define M_CSR_PRMD_PPLV (((1<<W_CSR_PRMD_PPLV)-1)<<S_CSR_PRMD_PPLV)
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#define S_CSR_PRMD_PIE 2
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#define M_CSR_PRMD_PIE 0x4
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#define S_CSR_PRMD_PWE 3
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#define M_CSR_PRMD_PWE 0x8
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//0x2
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#define S_CSR_CU_FPen 0
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#define S_CSR_CU_LSXen 1
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#define S_CSR_CU_LASXen 2
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#define S_CSR_CU_LBTen 3
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//0x3
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#define S_CSR_Config_DisRDT1 5
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#define S_CSR_Config_DisRDT2 6
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#define S_CSR_Config_DisRDT3 7
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#define S_CSR_Config_ALC0 12
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#define S_CSR_Config_ALC1 13
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#define S_CSR_Config_ALC2 14
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#define S_CSR_Config_ALC3 15
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#define W_CSR_Config_ALC0 1
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#define W_CSR_Config_ALC1 1
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#define W_CSR_Config_ALC2 1
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#define W_CSR_Config_ALC3 1
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#define M_CSR_Config_Short 0xf
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#define M_CSR_Config_ALC0 (((1<<W_CSR_Config_ALC0)-1)<<S_CSR_Config_ALC0)
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#define M_CSR_Config_ALC1 (((1<<W_CSR_Config_ALC1)-1)<<S_CSR_Config_ALC1)
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#define M_CSR_Config_ALC2 (((1<<W_CSR_Config_ALC2)-1)<<S_CSR_Config_ALC2)
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#define M_CSR_Config_ALC3 (((1<<W_CSR_Config_ALC3)-1)<<S_CSR_Config_ALC3)
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#define S_CSR_Config_NWP0 16
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#define S_CSR_Config_NWP1 17
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#define S_CSR_Config_NWP2 18
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//0x4
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#define S_CSR_ExConfig_IM 0
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#define M_CSR_ExConfig_IM 0x1fff
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#define S_CSR_ExConfig_IM0 0
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#define S_CSR_ExConfig_IM1 1
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#define S_CSR_ExConfig_IM2 2
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#define S_CSR_ExConfig_IM3 3
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#define S_CSR_ExConfig_IM4 4
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#define S_CSR_ExConfig_IM5 5
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#define S_CSR_ExConfig_IM6 6
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#define S_CSR_ExConfig_IM7 7
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#define S_CSR_ExConfig_IM8 8
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#define S_CSR_ExConfig_IM9 9
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#define S_CSR_ExConfig_IM10 10
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#define S_CSR_ExConfig_IM11 11
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#define S_CSR_ExConfig_IM13 13
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#define S_CSR_ExConfig_IM12 12
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#define S_CSR_ExConfig_IM_SW0 0
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#define S_CSR_ExConfig_IM_SW1 1
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#define S_CSR_ExConfig_IM_HW0 2
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#define S_CSR_ExConfig_IM_HW1 3
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#define S_CSR_ExConfig_IM_HW2 4
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#define S_CSR_ExConfig_IM_HW3 5
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#define S_CSR_ExConfig_IM_HW4 6
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#define S_CSR_ExConfig_IM_HW5 7
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#define S_CSR_ExConfig_IM_HW6 8
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#define S_CSR_ExConfig_IM_HW7 9
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#define S_CSR_ExConfig_IM_PCOV 10
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#define S_CSR_ExConfig_IM_TI 11
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#define S_CSR_ExConfig_IM_IPI 12
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#define S_CSR_ExConfig_IM_NMI 13
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#define S_CSR_ExConfig_VS 16
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#define W_CSR_ExConfig_VS 3
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#define M_CSR_ExConfig_VS (((1<<W_CSR_ExConfig_VS)-1)<<S_CSR_ExConfig_VS)
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//0x5 CSR_ExStatus
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#define S_CSR_ExStatus_IS 0
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#define W_CSR_ExStatus_IS 15
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#define S_CSR_ExStatus_IS0 0
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#define S_CSR_ExStatus_IS1 1
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#define S_CSR_ExStatus_IS2 2
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#define S_CSR_ExStatus_IS3 3
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#define S_CSR_ExStatus_IS4 4
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#define S_CSR_ExStatus_IS5 5
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#define S_CSR_ExStatus_IS6 6
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#define S_CSR_ExStatus_IS7 7
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#define S_CSR_ExStatus_IS8 8
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#define S_CSR_ExStatus_IS9 9
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#define S_CSR_ExStatus_IS10 10
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#define S_CSR_ExStatus_IS11 11
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#define S_CSR_ExStatus_IS12 12
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#define S_CSR_ExStatus_IS13 13
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#define S_CSR_ExStatus_SW0 0
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#define S_CSR_ExStatus_SW1 1
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#define S_CSR_ExStatus_HW0 2
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#define S_CSR_ExStatus_HW1 3
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#define S_CSR_ExStatus_HW2 4
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#define S_CSR_ExStatus_HW3 5
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#define S_CSR_ExStatus_HW4 6
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#define S_CSR_ExStatus_HW5 7
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#define S_CSR_ExStatus_HW6 8
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#define S_CSR_ExStatus_HW7 9
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#define S_CSR_ExStatus_PCOV 10
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#define S_CSR_ExStatus_TI 11
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#define S_CSR_ExStatus_IPI 12
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#define S_CSR_ExStatus_NMI 13
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#define S_CSR_ExStatus_Ecode 16
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#define W_CSR_ExStatus_Ecode 6
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#define S_CSR_ExStatus_EsubCode 22
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#define W_CSR_ExStatus_EsubCode 9
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//0x10 CSR_TLBIDX
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#define S_CSR_TLBIDX_INDEX 0
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#define W_CSR_TLBIDX_INDEX 12
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#define M_CSR_TLBIDX_INDEX (((1<<W_CSR_TLBIDX_INDEX)-1)<<S_CSR_TLBIDX_INDEX)
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#define S_CSR_TLBIDX_PS 24
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#define W_CSR_TLBIDX_PS 6
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#define M_CSR_TLBIDX_PS (((1<<W_CSR_TLBIDX_PS)-1)<<S_CSR_TLBIDX_PS)
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#define S_CSR_TLBIDX_V 31
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#define W_CSR_TLBIDX_V 1
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#define M_CSR_TLBIDX_V (((1<<W_CSR_TLBIDX_V)-1)<<S_CSR_TLBIDX_V)
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//0x11 CSR_TLBEHI
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#define S_CSR_TLBEHI_VPN2 13
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#define W_CSR_TLBEHI_VPN2 35
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#define M_CSR_TLBEHI_VPN2 (((1<<W_CSR_TLBEHI_VPN2)-1)<<S_CSR_TLBEHI_VPN2)
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//0x15 CSR_GuestTLB
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#define S_CSR_GuestTLB_GVTLB 0
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#define W_CSR_GuestTLB_GVTLB 6
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#define M_CSR_GuestTLB_GVTLB (((1<<W_CSR_GuestTLB_GVTLB)-1)<<S_CSR_GuestTLB_GVTLB)
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#define S_CSR_GuestTLB_use_rid 12
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#define W_CSR_GuestTLB_use_rid 1
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#define M_CSR_GuestTLB_use_rid (((1<<W_CSR_GuestTLB_use_rid)-1)<<S_CSR_GuestTLB_use_rid)
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#define S_CSR_GuestTLB_RID 16
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#define W_CSR_GuestTLB_RID 8
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#define M_CSR_GuestTLB_RID (((1<<W_CSR_GuestTLB_RID)-1)<<S_CSR_GuestTLB_RID)
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//0x16 CSR_GTLBR
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#define S_CSR_GTLBR_is_GTLB 0
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#define W_CSR_GTLBR_is_GTLB 1
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#define M_CSR_GTLBR_is_GTLB (((1<<W_CSR_GTLBR_is_GTLB)-1)<<S_CSR_GTLBR_is_GTLB)
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#define S_CSR_GTLBR_TLBR_RID 16
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#define W_CSR_GTLBR_TLBR_RID 8
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#define M_CSR_GTLBR_TLBR_RID (((1<<W_CSR_GTLBR_TLBR_RID)-1)<<S_CSR_GTLBR_TLBR_RID)
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//0x18 CSR_ASID
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#define S_CSR_ASID_ASID 0
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#define W_CSR_ASID_ASID 10
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#define M_CSR_ASID_ASID (((1<<W_CSR_ASID_ASID)-1)<<S_CSR_ASID_ASID)
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//0x41 CSR_TimerConfig
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#define S_CSR_TimerConfig_En 0
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#define S_CSR_TimerConfig_Period 1
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//0x50 CSR_GuestInfo
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#define S_CSR_GuestInfo_PVM 1
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#define W_CSR_GuestInfo_PVM 1
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#define M_CSR_GuestInfo_PVM (((1<<W_CSR_GuestInfo_PVM)-1)<<S_CSR_GuestInfo_PVM)
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#define S_CSR_GuestInfo_GID 16
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#define W_CSR_GuestInfo_GID 8
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#define M_CSR_GuestInfo_GID (((1<<W_CSR_GuestInfo_GID)-1)<<S_CSR_GuestInfo_GID)
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//0x51 CSR_GuestConfig
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#define S_CSR_GuestConfig_GPERFNum 24
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#define M_CSR_GuestConfig_GPERFNum 0x7000000
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//0x60
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#define S_CSR_LLBit_ROLLB 0
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#define S_CSR_LLBit_WCLLB 1
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#define S_CSR_LLBit_KLO 2
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//0x80 CSR_GSConfig
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#define S_CSR_GSConfig_Stfill 8
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#define W_CSR_GSConfig_Stfill 1
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#define M_CSR_GSConfig_Stfill (((1<<W_CSR_GSConfig_Stfill)-1)<<S_CSR_GSConfig_Stfill)
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//0x81 CSR_Flush
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#define M_CSR_Flush_VTLB 0x1
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#define M_CSR_Flush_FTLB 0x2
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#define M_CSR_Flush_DTLB 0x4
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#define M_CSR_Flush_ITLB 0x8
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#define M_CSR_Flush_BTAC 0x10
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//0x8a
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#define S_CSR_RFEPC_IsTLBR 0
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#define M_CSR_REEPC_EPC 0xfffffffffffffffc
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//0x8f
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#define S_CSR_RFState_PPLV 0
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#define S_CSR_RFState_PIE 2
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#define S_CSR_RFState_PVM 3
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#define S_CSR_RFState_PWE 4
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#define M_CSR_RFState_PPLV 0x3
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#define M_CSR_RFState_PIE 0x4
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#define M_CSR_RFState_PVM 0x8
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#define M_CSR_RFState_PWE 0x10
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//0x90
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#define S_CSR_ERRCTL_ERRMode 0
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#define S_CSR_ERRCTL_PPLV 2
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#define S_CSR_ERRCTL_PIE 4
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#define S_CSR_ERRCTL_PVM 5
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#define S_CSR_ERRCTL_PWE 6
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#define S_CSR_ERRCTL_PDA 7
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#define S_CSR_ERRCTL_PPG 8
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#define S_CSR_ERRCTL_PDACF 9
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#define S_CSR_ERRCTL_PDACM 11
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#define M_CSR_ERRCTL_PPLV 0xc
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#define M_CSR_ERRCTL_PIE 0x10
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#define M_CSR_ERRCTL_PVM 0x20
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#define M_CSR_ERRCTL_PWE 0x40
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#define M_CSR_ERRCTL_PDA 0x80
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#define M_CSR_ERRCTL_PPG 0x100
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#define M_CSR_ERRCTL_PDACF 0x600
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#define M_CSR_ERRCTL_PDACM 0x1800
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//0xaf userdef
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#define S_CSR_USERDEF_DC 4
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//0x200 CSR_PCCtl
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#define S_CSR_PCCtl_EVENT 0
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#define M_CSR_PCCtl_EVENT 0x3ff
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#define S_CSR_PCCtl_PLV 16
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#define M_CSR_PCCtl_PLV 0xf0000
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#define S_CSR_PCCtl_GREN 21
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#define M_CSR_PCCtl_GREN 0x600000
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#endif /* _CSRDEF_H */
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